Intersil and design is a registered trademark of Intersil Americas Inc. Page 8 Typical Performance Curves 7. Typical Performance Curves 0. Typical Applications Continued V 6.
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Each array consists of five independent transistors two PNP and three NPN types on a common substrate, which has a separate connection. Independent connections for each transistor permit maximum flexibility in circuit design. The is a relaxed version of the CA This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. The collector of each transistor of the CA is isolated from the substrate by an integral diode. The substrate Terminal 16 must be connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action. JA is measured with the component mounted on an evaluation PC board in free air. Care must be taken to avoid exceeding the maximum junction temperature.
Use the total power dissipation all transistors and thermal resistances to calculate the junction temperature. Actual forcing current is via the emitter for this test.
CA3096AE Intersil, CA3096AE Datasheet
CA3096AE DATASHEET PDF
CA3096AE View Datasheet(PDF) - Intersil